Basic Details
Organisation Chain SHRI MATA VAISHNO DEVI UNIVERSITY||REGISTRAR SMVDU||ENGINEERING WING SMVDU
Tender Reference Number SMVDU/SoECE/Tenders/25/39
Tender ID 2025_SM_298494_1 Withdrawal Allowed Yes
Tender Type Open Tender Form Of Contract Percentage
Tender Category Goods No. of Covers 2
General Technical Evaluation Allowed No ItemWise Technical Evaluation Allowed No
Payment Mode Offline Is Multi Currency Allowed For BOQ No
Is Multi Currency Allowed For Fee No Allow Two Stage Bidding No
 
Payment Instruments
Offline
S.No Instrument Type
1 Fixed deposit
2 CDR (Cash Deposit)
Covers Information, No. Of Covers - 2
Cover No Cover Type Description Document Type
1 Fee/PreQual/ENIT ENIT .pdf
2 BoQ BoQ .xls
 
 
 
Tender Fee Details, [Total Fee in ₹ * - 1,000]
Tender Fee in ₹ 1,000
Fee Payable To REGISTRAR SMVDU Fee Payable At KATRA
Tender Fee Exemption Allowed No
EMD Fee Details
EMD Amount in ₹ 20,000 EMD Exemption Allowed No
EMD Fee Type fixed EMD Percentage NA
EMD Payable To REGISTRAR SMVDU EMD Payable At KATRA
 
 
Work Item Details
Title Supply, Installation, Training, Testing and Commissioning of Machine Learning Based FPGA Kits for CEINC Lab
Work Description Supply, Installation, Training, Testing and Commissioning of Machine Learning Based FPGA Kits for CEINC Lab at School of Electronics and Communication Engineering, SMVDU, Kakryal, Katra
NDA/Pre Qualification Please refer Tender documents.
Independent External Monitor/Remarks NA
Tender Value in ₹ 10,00,000 Product Category Electronics Equipment Sub category NA 
Contract Type Tender Bid Validity(Days) 30 Period Of Work(Days) NA 
Location SMVDU Pincode 182320 Pre Bid Meeting Place NA 
Pre Bid Meeting Address NA  Pre Bid Meeting Date NA  Bid Opening Place SMVDU
Should Allow NDA Tender No  Allow Preferential Bidder No
 
Critical Dates
Published Date 18-Dec-2025 04:00 PM Bid Opening Date 06-Jan-2026 11:00 AM
Document Download / Sale Start Date 18-Dec-2025 04:00 PM Document Download / Sale End Date 05-Jan-2026 05:00 PM
Clarification Start Date NA Clarification End Date NA
Bid Submission Start Date 18-Dec-2025 04:00 PM Bid Submission End Date 05-Jan-2026 05:00 PM
 
Tenders Documents
NIT Document
S.No Document Name Description Document Size (in KB)
1 Tendernotice_1.pdf   ENIT Tender for FPGA Kits 5093.28
Download as zip file
Work Item Documents
S.No Document Type Document Name Description Document Size (in KB)
1 BOQ BOQ_967511.xls Digital Signature BoQ for Machine Learning Based FPGA Kits 243.50
 
Tender Inviting Authority
Name HOD SoECE
Address C Block SMVDU
 
 
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